Package substrate

ABSTRACT

This disclosure provides a package substrate and its fabrication method. The package substrate includes: a carrier; a first wiring layer formed on the carrier; a conductive pillar layer having a plurality of metal pillars on the first wiring layer; a molding compound layer formed on the first wiring layer, covering all the first wiring layer and the metal pillars, and exposing one end face of each metal pillar; a second wiring layer formed on the molding compound layer and the exposed end faces of the metal pillars; and a protection layer formed on the second wiring layer.

This application claims the benefit of Taiwan application Serial No.103118993, filed May 30, 2014, the disclosure of which is incorporatedby reference herein in its entirety.

TECHNICAL FIELD

The present disclosure relates to a package substrate.

TECHNICAL BACKGROUND

A next-generation electronic product is asked to have multiple functionsand high-speed performance other than compactness. Theintegrated-circuit manufacturers have moved to smaller design rules tomake chips with much more electronic devices. On the other hand, thetechniques for packaging the chips or semiconductor substrates have alsobeen developed for the same purpose.

Conventionally, the molding compound layer in a package substrate isformed by using transfer molding or injection molding. For example,FIGS. 1A to 1C show cross-sectional views of a package substrate indifferent steps of a prior-art fabrication process. The packagesubstrate has a wiring layer 12 and metal pillars 13 on a carrier 11, asshown in FIG. 1A. Before the formation of molding compound layers 14 onthe wiring layer 12 and the metal pillars 13, the top surface of thecarrier 11 is divided into grid regions. The molding compound layers 14are formed in turn by molding and each of the molding compound layers 14is located in a grid region. A molding compound layer 14 can be formedon the wiring layer 12 and the metal pillars 13 in the left region ofthe carrier 11 as shown in FIG. 1B. Then another molding compound layer14 can be formed on the wiring layer 12 and the metal pillars 13 in theright region of the carrier 11 as shown in FIG. 1C. Thus, gaps orrecesses may be formed between the neighboring molding compound layers14 and they may introduce chemical contamination caused by thedielectric processing in the subsequent fabrication process and thepossible baring of the carrier 11. And the multiple-step molding processmay require more processing time. Therefore, it is in need to develop anew means for fabricating package substrates.

TECHNICAL SUMMARY

According to one aspect of the present disclosure, one embodimentprovides a package substrate, which includes: a carrier; a first wiringlayer formed on the carrier; a conductive pillar layer having aplurality of metal pillars on the first wiring layer; a molding compoundlayer formed on the first wiring layer, covering all the first wiringlayer and the metal pillars, and exposing one end face of each metalpillar; a second wiring layer formed on the molding compound layer andthe exposed end faces of the metal pillars; and a protection layerformed on the second wiring layer.

According to another aspect of the present disclosure, anotherembodiment provides a method of fabricating a package substrate, whichincludes: (A) providing a carrier; (B) forming a first wiring layer onthe carrier; (C) forming a conductive pillar layer having a plurality ofmetal pillars on the first wiring layer; (D) forming a molding compoundlayer which covers all the first wiring layer and the metal pillars onthe carrier; (E) exposing the metal pillars by removing a part of themolding compound layer; (F) forming a second wiring layer on the moldingcompound layer and the exposed parts of the metal pillars; and (G)forming a protection layer on the second wiring layer. Wherein, step (D)is processed for only one time.

In one embodiment, step (B) may include: forming and patterning a firstphotoresist layer on the carrier; forming a first metal layer on thefirst photoresist layer; and removing the first photoresist layer andconcurrently patterning the first metal layer to form the first wiringlayer.

In one embodiment, step (C) may include: forming and patterning a secondphotoresist layer on the carrier; forming a second metal layer on thesecond photoresist layer; and removing the second photoresist layer andconcurrently patterning the second metal layer to form the metalpillars.

In one embodiment, step (D) may include: providing a molding compound ina mold container; and pressing the mold container against the carrierand concurrently curing the molding compound to form the moldingcompound layer.

In one embodiment, step (D) may include: providing a mold container anda molding compound in the form of powder or sheet; melting the moldingcompound and loading it into the mold container; and pressing the moldcontainer against the carrier and concurrently curing the moldingcompound to form the molding compound layer.

In one embodiment, step (E) may include: polishing the molding compoundlayer to remove it downwards until the exposure of top faces of themetal pillars.

In one embodiment, step (F) may include: forming and patterning a thirdphotoresist layer on the molding compound layer; forming a third metallayer on the third photoresist layer; and removing the third photoresistlayer and concurrently patterning the third metal layer to form thesecond wiring layer.

In one embodiment, the molding compound layer is formed of a materialselected from the group consisting of novolac-based resin, epoxy-basedresin, and silicone-based resin.

Further scope of applicability of the present application will becomemore apparent from the detailed description given hereinafter. However,it should be understood that the detailed description and specificexamples, while indicating exemplary embodiments of the disclosure, aregiven by way of illustration only, since various changes andmodifications within the spirit and scope of the disclosure will becomeapparent to those skilled in the art from this detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure will become more fully understood from thedetailed description given herein below and the accompanying drawingswhich are given by way of illustration only, and thus are not limitativeof the present disclosure and wherein:

FIGS. 1A to 1C are cross-sectional views of a package substrate indifferent steps of a prior-art fabrication process.

FIG. 2 is a cross-sectional view of a package substrate according to oneembodiment of the present disclosure.

FIG. 3 is a flowchart of a method for fabricating a package substrate.

FIGS. 4A to 4F are cross-sectional views of the package substrateaccording to the embodiment of FIG. 2 of the present disclosure,corresponding to different steps in the fabrication process.

FIGS. 5A and 5B are schematic plots of the formation of the moldingcompound layer by compression molding.

DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

For further understanding and recognizing the fulfilled functions andstructural characteristics of the disclosure, several exemplaryembodiments cooperating with detailed description are presented as thefollowing. Reference will now be made in detail to the preferredembodiments, examples of which are illustrated in the accompanyingdrawings.

In the following description of the embodiments, it is to be understoodthat when an element such as a layer (film), region, pattern, orstructure is stated as being “on” or “under” another element, it can be“directly” on or under another element or can be “indirectly” formedsuch that an intervening element is also present. Also, the terms suchas “on” or “under” should be understood on the basis of the drawings,and they may be used herein to represent the relationship of one elementto another element as illustrated in the figures. It will be understoodthat this expression is intended to encompass different orientations ofthe elements in addition to the orientation depicted in the figures,namely, to encompass both “on” and “under”. In addition, although theterms “first”, “second” and “third” are used to describe variouselements, these elements should not be limited by the term. Also, unlessotherwise defined, all terms are intended to have the same meaning ascommonly understood by one of ordinary skill in the art.

FIG. 2 schematically shows a cross-sectional view of a package substrate100 according to one embodiment of the present disclosure. The packagesubstrate 100 includes a carrier 110, a first wiring layer 120, aconductive pillar layer 130, a molding compound layer 140, a secondwiring layer 150, and a protection layer 160. Wherein, the carrier 110is used to carry and support electronic components and conductive wiresof the package substrate 100, and it may be made of metal or fiberglassin the embodiment. The first wiring layer 120 is a layer of conductivematerial formed on the carrier 110 and patterned to be a part of theconductive wires of the package substrate 100. The conductive wires maybe made of metal in the embodiment. The conductive pillar layer 130 is alayer of conductive material formed on the first wiring layer 120 andpatterned to be a plurality of metal pillars 131, which are used toelectrically connect the first wiring layer 120 and the second wiringlayer 150. The metal pillars 131 may be made of copper in theembodiment. The molding compound layer 140 acts as an insulation layerbetween the first wiring layer 120 and the second wiring layer 150. Themolding compound layer 140 may cover all the first wiring layer 120 andthe conductive pillar layer 130 while expose one end face of each metalpillar 131, so that the metal pillars 131 can connect the first wiringlayer 120 and the second wiring layer 150. The molding compound layer140 can be made of insulating material suitable for compression molding,such as novolac-based resin, epoxy-based resin, and silicone-basedresin. The second wiring layer 150 is formed on the molding compoundlayer 140 and the exposed end faces of the metal pillars 131, andpatterned to be another part of the conductive wires of the packagesubstrate 100. The protection layer 160 is formed on the second wiringlayer 150 and the molding compound layer 140, so as to protect thesecond wiring layer 150 from being damaged by external objects or thesubsequent fabrication process. The package substrate 100 can be aflip-chip chip size package (FCCSP) substrate used to construct theso-called “molded interconnection substrate (MIS)”.

FIG. 3 shows a flowchart of a method 200 for fabricating a packagesubstrate, and FIGS. 4A to 4F are cross-sectional views of the packagesubstrate according to the embodiment of FIG. 2 of the presentdisclosure, corresponding to steps S210 to S260 in the fabricationprocess. The method 200 will be described in detail in the followingparagraphs.

At step S210, a carrier 110 is provided as shown in FIG. 4A to carry andsupport electronic components and conductive wires of the packagesubstrate 100, e.g. the first wiring layer 120, the conductive pillarlayer 130, the molding compound layer 140, the second wiring layer 150,and the protection layer 160 in FIG. 2. The carrier 110 is made of metalor fiberglass in the embodiment.

At step S220, a first wiring layer 120 is formed on the carrier 110 andthen patterned to be a part of the conductive wires of the packagesubstrate 100, as shown in FIG. 4B. The first wiring layer 120 can bemade of copper or aluminum and formed by evaporating or electrolyticplating. The first wiring layer 120 can be patterned by thephotolithography. For example, a first photoresist layer (not shown) canbe deposited on the carrier 110 by spin-coating, and it would bepatterned by exposure to light and developing. Then, a first metal layer(not shown) is deposited on the patterned first photoresist layer. Byusing the lift-off processing, the patterned first photoresist layer canbe washed out together with the part of the first metal layer directlyon its top surface, and the rest of the first metal layer not on thepatterned first photoresist layer stays on the carrier 110 to be thefirst wiring layer 120 in the embodiment.

At step S230, a conductive pillar layer 130 is formed on the firstwiring layer 120 and then patterned to be a plurality of metal pillars131 as shown in FIG. 4C. The metal pillars 131 are used to electricallyconnect the first wiring layer 120 and the second wiring layer 150 to beproceeded in the subsequent fabrication steps. The metal pillars 131 canbe made of copper or aluminum and formed by evaporating or electrolyticplating. The conductive pillar layer 130 can be patterned by thephotolithography. For example, a second photoresist layer (not shown)can be deposited on both the carrier 110 and the first wiring layer 120by laminating dry film photoresist, and it would be patterned byexposure to light and developing. Then, a second metal layer (not shown)is deposited on the patterned second photoresist layer. By using thelift-off processing, the patterned second photoresist layer can beremoved out together with the part of the second metal layer directly onits top surface, and the rest of the second metal layer not on thepatterned second photoresist layer stays on the first wiring layer 120to be the metal pillars 131 of the conductive pillar layer 130 in theembodiment.

At step S240, a molding compound layer 140 is formed on the carrier 110,and it covers all the top surface of the carrier 110 including the firstwiring layer 120 and all the metal pillars 131 of the conductive pillarlayer 130, as shown in FIG. 4D. It serves as an insulation layer betweenthe first wiring layer 120 and the second wiring layer 150. The moldingcompound layer 140 can be formed by compression molding as shown inFIGS. 5A and 5B. At first, a molding compound 142 is provided in a moldcontainer 141. The mold container 141 corresponds with the carrier 110properly, so that the first wiring layer 120, the metal pillars 131 andthe molding compound 142 are all located between the mold container 141and the carrier 110, as shown in FIG. 5A. Then, a downward pressure isapplied to the carrier 110 and an upward pressure is applied to the moldcontainer 141. The pressures are maintained until the molding compound142 has cured to be the molding compound layer 140 as shown in FIG. 5B.The mold container 141 can be removed after that. Alternatively, themolding compound layer 140 can be compression-molded in another way. Atfirst, a mold container 141 and a molding compound 142 in the form ofpowder or sheet are provided. The molding compound 142 can be melted byheating and loaded into the mold container 141. Then the mold container141 and the carrier 110 are arranged correspondingly, so that the firstwiring layer 120, the metal pillars 131 and the molding compound 142 arelocated between the mold container 141 and the carrier 110, as shown inFIG. 5A. Then a downward pressure is applied to the carrier 110 and anupward pressure is applied to the mold container 141. The pressures aremaintained until the molding compound 142 has cured to be the moldingcompound layer 140 as shown in FIG. 5B. The mold container 141 can beremoved after that. The molding compound layer 140 can be made ofinsulating material suitable for compression molding, such asnovolac-based resin, epoxy-based resin, and silicone-based resin; but isnot limited thereto.

Compared with the prior art of fabricating a package substrate as shownin FIGS. 1A to 1C, the molding compound layer 140 of the presentdisclosure is formed on the carrier 110 in only one single fabricationstep, S240, and it covers the whole of the top surface of the carrier110. On the contrary, multiple molding compound layers 14 are formed onthe carrier 11; wherein, each of the molding compound layers 14 islocated in a grid and is formed in turn, as shown in FIGS. 1A to 1C.That is to say, the molding compound layers 14 in the prior art areformed on the carrier 11 one by one in multiple steps like S240, so thatthey can cover the whole of the top surface of the carrier 11. Also,gaps or recesses may be formed between the neighboring molding compoundlayers 14 and they may introduce chemical contamination in thefabrication process. These problems can be avoided according to theembodiment of the present disclosure.

At step s250, the metal pillars 131 are exposed by removing a part ofthe molding compound layer 140, as shown in FIG. 4E. Although themolding compound layer 140 serves as an insulation layer between thefirst wiring layer 120 and the second wiring layer 150, they areelectrically connected with each other by the metal pillars 131. Themolding compound layer 140 covers all the first wiring layer 120 and allthe metal pillars 131 on the carrier 110 after step S240. In order toconnect the first wiring layer 120 and the second wiring layer 150, theupper part of the molding compound layer 140 has to be removed to exposetop faces of the metal pillars 131. The removal can be realized bypolishing or grinding, such as the chemical mechanical polishing (CMP)process. The molding compound layer 140 is polished to remove its upperpart downwards until the exposure of the top faces of the metal pillars131. In another embodiment, it can be designed to expose the top facesof the metal pillars 131 in the formation of the molding compound layer140. If so, the removal in step S250 can be omitted.

At step S260, a second wiring layer 150 is formed on the moldingcompound layer 140 and the exposed top faces of the metal pillars 131,and then patterned to be another part of the conductive wires of thepackage substrate 100, as shown in FIG. 4F. The second wiring layer 150can be made of copper or aluminum and formed by evaporating orelectrolytic plating. The second wiring layer 150 can be patterned bythe photolithography. For example, a third photoresist layer (not shown)can be deposited on the molding compound layer 140 by spin-coating, andit would be patterned by exposure to light and developing. Then, a thirdmetal layer (not shown) is deposited on the patterned third photoresistlayer. By using the lift-off processing, the patterned third photoresistlayer can be washed out together with the part of the third metal layerdirectly on its top surface, and the rest of the third metal layer noton the patterned third photoresist layer stays on the molding compoundlayer 140 to be the second wiring layer 150 in the embodiment.

At step S270, a protection layer 160 is formed on the second wiringlayer 150 and the molding compound layer 140. The protection layer 160is used to electrically insulate the neighboring conductive wires of thesecond wiring layer 150 and to protect the second wiring layer 150 frombeing damaged by external objects or the subsequent fabrication process.Moreover, the package substrate 100 of the embodiment can be furtherprocessed to be a packaged integrated-circuit device. For example, theprotection layer 160 can be patterned by using the photolithography toexpose a part of the second wiring layer 150, so that it can beconnected to an external circuit (not shown). Alternatively, theso-called “backend processing” can be applied to the package substrate100 of the embodiment. For example, a part of the lower part of thecarrier 110 can be removed by using the photolithography to form anopening (not shown) exposing the first wiring layer 120 and the moldingcompound layer 140, so that an external electronic device (not shown)can be mounted in the opening with electrical connection to the firstwiring layer 120.

With respect to the above description then, it is to be realized thatthe optimum dimensional relationships for the parts of the disclosure,to include variations in size, materials, shape, form, function andmanner of operation, assembly and use, are deemed readily apparent andobvious to one skilled in the art, and all equivalent relationships tothose illustrated in the drawings and described in the specification areintended to be encompassed by the present disclosure.

What is claimed is:
 1. A package substrate comprising: a carrier; afirst wiring layer formed on the carrier; a conductive pillar layerhaving a plurality of metal pillars on the first wiring layer; a moldingcompound layer formed on the first wiring layer, covering all the firstwiring layer and the metal pillars, and exposing one end face of eachmetal pillar; a second wiring layer formed on the molding compound layerand the exposed end faces of the metal pillars; and a protection layerformed on the second wiring layer.
 2. The package substrate according toclaim 1, wherein the package substrate is a flip-chip chip size package(FCCSP) substrate.
 3. The package substrate according to claim 1,wherein the first wiring layer comprises at least one metal wire.
 4. Thepackage substrate according to claim 1, wherein the second wiring layercomprises at least one metal wire.
 5. The package substrate according toclaim 1, wherein the metal pillars comprise copper pillars.
 6. Thepackage substrate according to claim 1, wherein the molding compoundlayer is formed of a material selected from the group consisting ofnovolac-based resin, epoxy-based resin, and silicone-based resin.